I’ve been working on an FPGA-based GPU, in order to progress in learning about FPGAs, memory controllers, resource scheduling, etc.
Updates on my Hackaday.io project site.
Several pieces of the Xilinx toolchain use the SmartHeap library. This library hooks allocator functions in msvcrt.dll by export – overwriting the original functions with jumps to their patched versions. This used to be fine, but now several of the allocator entrypoints on msvcrt are simply jumps to the real implementation. These are short jumps, so the instruction size count is small (typically 2-3 bytes). Add to that the 5 NOP bytes that usually pad functions apart and that isn’t enough for SmartHeap’s overwrite jumps. Here’s an example of the trampoline they write:
000000000013b220 48b85079910a00000000 mov rax,offset SHSMP64!shi_new (00000000`0a917950)
000000000013b22a ffe0 jmp rax
That’s 12 bytes – 4 too many. What I was seeing is the overwrite for operator new stomping over wcscmp which is right after it, and the application crashing later when calling this function:
0:000> uf msvcrt!wcscmp
Flow analysis was incomplete, some code may be missing
00007ffcd1564694 0000 add byte ptr [rax],al
00007ffcd1564696 ffe0 jmp rax
You can see here how wcscmp has been overwritten by the tail of the patch. I did some searching around and found this post by a Xilinx employee, explaining how to turn off SmartHeap.
Basically the gist of it is that in the ISE_DS\ISE\lib\nt64 directory, back up libPortability.dll (which links to SmartHeap), and rename libPortabilityNOSH.dll to libPortability.dll. This fixed ISE for me, but unfortunately a lot of the other Xilinx tools have their own lib\nt64 directories with duplicate copies of libPortability.dll. For each lib\nt64 directory, you’ll need to overwrite libPortability.dll with that original libPortabilityNOSH.dll – which is not duplicated in the non-ISE lib\nt64 directories.
I checked for updates and it appears I’m running with the latest version (14.7) with no updates available. Hopefully Xilinx will distribute an update for the SmartHeap binaries.
AllWinner has been manufacturing cheap multi-core ARM processors for Android devices for some time now. It appears all of that success on the low-end has given them the funds needed to produce a high-end chip – the A80 Octa, which has 4 A15 cores and 4 A7 cores (ARM big.LITTLE).
Processor roadmap here, with specs – check out their Q4 2015 deliverable!
Ever since I saw a YDPG18A mod post where flash was upgraded (unsuccessfully), I’ve been curious about upgrading NAND flash. After I started investigating I realized the upgrade mentioned wouldn’t work, so I called the guy on it and he mentioned it didn’t work, just that he hadn’t gotten around to posting about it. If he’d found the exact same model flash chip as the existing one, soldered it on, and reflashed, it would have worked. But a lot of the flash chips used in these devices are old and hard to get ahold of. Luckily, they use a standard footprint (TSOP48), and a standard pinout used for SLC and MLC NAND flash.